frequency detector
英 [ˈfriːkwənsi dɪˈtektə(r)]
美 [ˈfriːkwənsi dɪˈtektər]
频率检测器
双语例句
- A fast locking phase-locked loops ( PLL) with a dual-slope phase frequency detector circuit is presented.
文中提出了一种用于高速锁相环的双斜鉴频鉴相器的结构设计。 - A Novel SEU/ SET Hardened Phase Frequency Detector
一种新型SEU/SET加固鉴频鉴相器设计 - He's got a scanner, frequency detector, God knows what else.
他有扫描器、频率探测器，天知道还有什么。 - This machine can be connected to ALC ( frequency detector) as clients required.
根据用户要求，可设置与ALC（频率监控仪）连接。 - The frequency test system of ultrasonic transducer is researched, and a new equipment idea based on it is put forward. The principle of electric circuit about simple frequency detector of ultrasonic transducer as well as experimental results is analyzed.
对超声波换能器频率测试系统进行了探讨，并在此基础上提出了改装设想，分析了所研究的简易超声波换能器频率测试仪的电路原理及实验结果。 - First, we review the fundamental concepts and basic parts of the PLL, then review the design methods of a PLL synthesizer and the one constituted by charge pump PFD ( phase and frequency detector) and passive loop filter is focused.
首先介绍锁相环的基本原理和基本组成部分，然后介绍锁相环频率合成器的设计方法，主要介绍由电荷泵鉴相鉴频器和无源环路滤波器构成的锁相环频率合成器。 - A dead-zone free Phase Frequency Detector and a programmable charge pump are employed to reduce their nonlinearity effects.
并且在设计中采用消除死区的鉴频鉴相器和可编程电荷泵，减小了电荷泵鉴频鉴相器的非线性效应。 - The whole instrument have the characteristics of little bulk, low cost, high precision and available using, which provides a new scheme for the design of signal generator and frequency detector.
整个仪器具有体积小、成本低、精度高和使用方便的特点，给信号发生和频率检测设计提供了一个新的方案。 - The behavioral level models of CPPLL include such sub modules: phase frequency detector ( PFD), charge pump ( CP), loop filter ( LF), voltage control oscillator ( OSC) and some auxiliary circuits.
设计了锁相环电路的鉴频鉴相器（PFD）单元、电荷泵（CP）单元、环路滤波器（LF）单元、压控振荡器（VCO）单元和一些辅助功能电路的行为级模型。 - The new architecture is composed of a no-dead-zone Phase Frequency Detector ( PFD), a Frequency to Voltage Converter ( FVC), a Voltage to Current Converter ( VCC) and some control logics.
该电荷泵电路由频率到无死区鉴频鉴相器电路（PFD）、电压转换电路（FVC）、电压到电流转换电路（VCC）以及一些逻辑控制电路和高精度低失配电荷泵组成。 - The peripheral controller consists of frequency detector, data sample controller, FIFO, LCD driver and the interface circuit between DSP and FPGA.
外围控制器囊括了硬件系统中几乎所有的数字电路，包括频率/周期测量、数据采集控制、FIFO、LCD驱动以及FPGA与DSP之间的接口电路等。 - A Phase Frequency Detector without Dead Zone for High Speed PLL
一种用于高速锁相环的零死区鉴频鉴相器 - The circuit employs an architecture of mixer plus LC frequency detector.
核心电路采用乘法器加LC选频器的结构。 - Studies on the simple frequency detector of ultrasonic transducer
简易超声波换能器频率测试仪的研究 - The experimental results and theory analysis correspond excellently with one another. The conclusion in this paper has importance directive significance for practical design and application of the phase-locked frequency detector.
实验结果与理论分析相吻合，文中的结论对实际设计和应用锁相鉴频器，具有重要的指导意义。 - A low-jitter clock generator for HDTV is designed with a high-speed phase/ frequency detector, a noise-suppressed charge pump and symmetrical load differential delay cells. Different noise models of the ring oscillator are discussed.
采用高速鉴频鉴相器、抗抖动电荷泵和差分对称负载延迟单元优化结构，综合分析环形振荡器各类噪声模型，设计了一种适用于HDTV的低抖动时钟电路。 - The phase frequency detector ( PFD) circuit is constituted with the dynamic D flip-flop ( DFF) and the delay circuit can, which can effectively overcome the dead area, and have high-speed and low power consumption features.
鉴频鉴相器电路采用动态D触发器（DFF）和延迟电路构成，能有效克服死区，具有高速和低功耗的特点。 - The non-ideality of the phase/ frequency detector and the charge pump, such as dead zone and current mismatch, affects the output in-band phase noise of the frequency synthesizer. The most eligible one is selected for the target application by comparing several methods of rejecting non-ideality.
相/频检测器和电荷泵存在许多非理想因素如死区、电流失配等，影响合成器输出带内噪声，需要对众多改善技术进行比较研究，选择适合本文应用的技术。 - Digital frequency detector can be very precise and achieve a most high resolution, however, at the cost of more time. Analog frequency discriminator has much faster response, but lower resolution and stability.
目前，采用数字方法研制的鉴频能达到较高的分辨力和稳定性，但频响往往较低，而用模拟方法制作的鉴频器虽频响较高，但稳定性和分辨力指标下降了。 - Afterwards, the design process of this project is described in detail, including the analysis and design of the phase/ frequency detector, change pump, loop filter and voltage controlled oscillator, as well as the whole circuit system.
接着论文详细讲述了电路的设计过程，包括鉴频鉴相器、电荷泵、环路滤波器、压控振荡器等电路模块的分析和设计。然后对环路的各项参数进行了详细的推导。 - The PLL type frequency synthesizer always contain voltage controlled oscillator, frequency divider, phase frequency detector, charge pump, and loop filter.
锁相环型频率综合器主要由压控振荡器，分频器，鉴频鉴相器，电荷泵以及环路滤波器等模块组成。 - In aspect of circuit implementation, various structures of phase frequency detector are discussed, and in order to overcome dead zone of phase frequency detector and improve operating frequency of circuit, circuit architectures are optimized.
在电路实现方面，讨论了鉴频鉴相器的各种结构，针对如何克服鉴频鉴相器死区和提高电路的工作频率，对电路结构进行了优化设计。 - The PLL consists of a crystal oscillator, a frequency divider, a phase/ frequency detector, a charge pump and a loop filter.
设计的电路包括鉴频鉴相器、压控振荡器、固定分频器、电荷泵和低通滤波器。 - Comparison among different ways to design Phase Frequency Detector ( PFD) is made, and the circuit is optimized to resolve the contradiction of delay span required by the "Dead Zone" effect and working frequency.
比较了鉴相器的各种实现方式，针对鉴相器的死区效应与工作频率之间的矛盾，对电路结构进行了优化设计。 - These techniques consequential several vehiclesDetector: Loop Detector, wave frequency detector, video detector.
这几种技术下相应产生的几种车辆检测器：环形线圈检测器、波频检测器、视频检测器等。 - The equipment mainly is applied to the measurement and analysis to filter, wide-band amplifier, frequency detector and the other active or passive linear network frequency characteristics.
该仪器主要应用于对滤波器、宽带放大器、鉴频器以及其它有源或无源线性网络频率特性的测试和分析。 - In this structure, the frequency detector and the phase detector are paralleled; meanwhile a modified weighted Decision-Directed ( MWDD) algorithm is adopted in phase detection.
在此结构中频率检测和相位检测同时进行，在鉴相阶段引入了改进的加权直接判决（MWDD）算法。 - Main tasks: First, design a fully symmetrical output signal timing, high-speed phase frequency detector and high-current matching wide-swing output fully differential charge pump circuit.
主要工作包括：首先，设计了一种输出时序信号完全对称的高速鉴频鉴相器和高电流匹配性宽摆幅输出的全差分电荷泵电路。 - The analysis of the dynamic performance of the PLL with a Phase Frequency Detector in the process of pull-in is based on the physical models and nonlinear methods.
建立了带有鉴频鉴相器的锁相环的物理模型，使用非线性方法分析了拉入过程的动态性能。